1. Related Applications
The present application claims priority from Japan Application No. 2001-116,905, which was filed on Apr. 16, 2001, and which is incorporated herein by reference for all purposes.
2. Field of the Invention
Illustrative, non-limiting embodiments of the present invention generally relate to a silicon wafer break pattern formed by etching weak spots along a silicon wafer scribe line, a silicon substrate obtained by breaking the wafer according to the break pattern, and a method of creating the break pattern.
3. Description of the Related Art
A related method of dividing a silicon wafer into chips of a desired size will be described below in conjunction with FIGS. 8(a) to 8(c) and 9(a) to 9(c). FIGS. 8(a) to 8(c) illustrate a mask pattern 5 and break patterns in a horizontal direction of the wafer, and FIGS. 9(a) to 9(c) illustrate a mask pattern 5 and break patterns in a vertical direction of the wafer.
In the method of dividing the silicon wafer, a break pattern is formed on the silicon wafer by etching through-holes 1 in the horizontal direction along a horizontal scribe line L1 (FIG. 8(b)) and by etching a through-holes 1 in the vertical direction along a vertical scribe line L2 (FIG. 9(b)). The remaining portions of the silicon wafer between adjacent through-holes 1 on the scribe lines L1 and L2 constitute weak spots 2 of the break patterns. Subsequently, when an external force is applied along the scribe lines L1 and L2, the weak spots 2 break, and the silicon wafer is divided into a plurality of chips. FIG. 8(c) shows the shape of one edge of the chips when the wafer is broken along the horizontal scribe line L1, and FIG. 9(c) shows the shape of one edge of the chips when the wafer is broken along the vertical scribe line L2.
The shape of the through-holes 1 is determined by the anisotropy of the etching process when the silicon wafer is perforated by the etching process. Specifically, the silicon wafer comprises single-crystal silicon having a crystal structure that is difficult to etch in a first direction and that is easy to etch in a second direction.
For example, assume that the silicon wafer has a crystal structure having (110) planes and (111) planes. If the silicon wafer is etched with a 40% by weight potassium hydroxide solution, the two (111) planes perpendicular to the (110) plane are difficult to remove via the etching process, and the planes respectively inclined 30xc2x0 to the two (111) planes are easy to remove via the etching process. For a general discussion of crystal structures, reference can be made to S. Wolf et al., Silicon Processing for the VLSI Era, Vol. 1, pages 1-5 (1986), which is incorporated herein by reference for all purposes.
If one of the (111) planes is then aligned at 0xc2x0 on the (110) plane, the other (111) plane is aligned at 70.53xc2x0 on the (110) plane. Also, the through-holes 1 formed in both the horizontal and vertical directions will form parallelograms, each having an acute angle of 70.53xc2x0. In order to form such through-holes 1, a mask pattern 5 (i.e. a pre-etching pattern) is used which has rows of parallelogram-shaped openings (or windows) 4 as shown in FIGS. 8(a) and 9(a). The shape of the windows 4 correspond to the shape of the through-holes 1, and the intervals between the openings 4 correspond to the weak spots 2. Also, the mask pattern 5 is formed on the wafer surface with a resist film, and the silicon exposed through the openings 4 is removed by wet etching.
As a result of the wet etching, the through-holes 1 are formed in the thickness direction of the wafer at the locations of the openings 4, and the break patterns (post-etching patterns) comprising the parallelogram-shaped through-holes 1 and weak spots 2 are formed as shown in FIGS. 8 (b) and 9 (b).
However, as shown in FIGS. 8(c) and 9(c), when the silicon wafer is divided along the break patterns described above, the location and shape of the breaks at the weak spots 2 cannot easily be made in a uniform manner. Specifically, after the silicon wafer is divided, a substantial amount of minute particles of waste and debris 6 is produced. Accordingly, the waste 6 must be carefully removed after the wafer is broken into multiple silicon substrates or chips. However, removing the waste 6 is extremely time-consuming and significantly decreases the manufacturing efficiency of the substrates or chips. Furthermore, if the waste 6 is not sufficiently removed, the remaining waste 6 leads to defects in the final finished product. For example, if an ink path substrate of an inkjet recording head is manufactured from a silicon substrate, waste 6 in the ink path of the substrate can interfere with ink flow, clog a nozzle, or cause other problems. Also, when a thin film is formed on the silicon substrate, any remaining waste 6 can cause defects and thus reduce the yield.
One way to reduce such waste 6 is to reduce the number of weak spots 2. This can be achieved by enlarging the through-holes 1 forming the break pattern in the direction of the scribe line L1 or L2. However, since the through-holes 1 are parallelograms having two (111) planes, enlarging the parallelograms also makes the scribe line L1 or L2 wider. When the scribe line L1 or L2 is widened, the number of silicon substrates that can be produced from a single wafer is reduced, and the high cost silicon wafers are inefficiently utilized. Furthermore, the production cost of the chips is substantially increased.
To avoid the above problem, long, narrow through-holes 1 may be formed. However, in such case, a substantial possibility exists that the through-holes 1 may not completely pierce the wafer due to the silicon wafer thickness and the angle at which the etching process etches silicon from the wafer.
Therefore, the above problems cannot be practically overcome by increasing the size of the parallelogram-shaped through-holes 1 or to make long, narrow (slender) through-holes 1.
Illustrative, non-limiting embodiments of the present invention overcome the disadvantages described above and other disadvantages. Also, the present invention is not required to overcome the disadvantages described above and the other disadvantages, and an illustrative, non-limiting embodiment of the present invention may not overcome any of the disadvantages.
Illustrative, non-limiting embodiments of the present invention may provide a silicon wafer break pattern that stabilizes the location and shape of the breaks at the weak spots and that reduces waste. Other illustrative, non-limiting embodiments of the present invention may provide the silicon substrates that are derived from such a wafer break pattern and may provide a method for creating the wafer break pattern.
One illustrative, non-limiting embodiment of the present invention relates to a break pattern formed on a wafer having a crystal structure. The break pattern comprises: through-holes formed in said wafer and formed in a direction of a scribe line of said wafer; and weak spots formed between said through-holes, respectively, wherein said scribe line is on a surface of said wafer and wherein said crystal structure of said wafer has first crystal planes oriented in a first direction and has second crystal planes oriented in a second direction, which is different than said first direction, wherein each of said through-holes is a parallelogram-shaped hole having opposed long sides defined by two of said first crystal planes and having opposed short sides defined by two of said second crystal planes that respectively intersect said two of said first crystal planes, and wherein said through-holes are disposed along said scribe line, a first group of said through-holes are substantially disposed on only a first side of said scribe line, and a second group of said through holes are substantially disposed only on a second side of said scribe line.
Another illustrative, non-limiting embodiment of the present invention relates to a break pattern formed on a wafer having a crystal structure. The break pattern comprises: through-holes formed in said wafer and formed in a direction of a scribe line of said wafer; and weak spots formed between said through-holes, respectively, wherein said scribe line is on a surface of said wafer and wherein said crystal structure of said wafer has first crystal planes oriented in a first direction and has second crystal planes oriented in a second direction, which is different than said first direction, wherein each of said through-holes comprise a first through-hole portion and a second through-hole portion disposed on opposite sides of said scribe line, wherein said first through-hole portion is defined by at least one inside first crystal plane of said first crystal planes, one outside first crystal plane of said first crystal planes, one second crystal plane of said second crystal planes, and one connecting surface, wherein said one outside first crystal plane is disposed further away from said scribe line than said one inside first crystal plane, wherein said one second crystal plane extends from one end of said one inside crystal plane to one end of said one outside first crystal plane, wherein said one connecting surface extends from said other end of said one outside first crystal plane towards said scribe line, wherein said second through-hole portion is defined by at least another inside first crystal plane of said first crystal planes, another outside first crystal plane of said first crystal planes, another second crystal plane of said second crystal planes, and another connecting surface, wherein said other outside first crystal plane is disposed further away from said scribe line than said other inside first crystal plane, wherein said other second crystal plane extends from one end of said other inside crystal plane to one end of said other outside first crystal plane, wherein said other connecting surface extends from said other end of said other outside first crystal plane towards said scribe line.
Yet another illustrative, non-limiting embodiment of the present invention relates to a break pattern formed on a wafer having a crystal structure. The break pattern comprises: through-holes formed in said wafer and formed in a direction of a scribe line of said wafer; and weak spots formed between said through-holes, respectively, wherein said scribe line is on a surface of said wafer and wherein said crystal structure of said wafer has first crystal planes oriented in a first direction and has second crystal planes oriented in a second direction, which is different than said first direction, wherein each of said through-holes have a zigzag shape and are formed by: a pair of said first crystal planes which are separated from each other in a direction of said scribe line; n pairs of said second crystal planes, wherein n is an integer greater than or equal to two, wherein said second crystal planes in each of said n pairs are disposed on opposite sides of said scribe line, and wherein one of said n pairs of said second crystal planes intersects one of said pair of said first crystal planes and another of said n pairs of said second crystal planes intersects another of said pair of said first crystal planes, and (nxe2x88x921) pairs of connecting surfaces, wherein said connecting surfaces in each of said (nxe2x88x921) pairs are disposed on opposite sides of said scribe line and are disposed between adjacent pairs of said n pairs of said second crystal planes.
Still a further illustrative, non-limiting embodiment of the present invention relates to a substrate having an edge formed when a wafer is broken according to a break pattern. The wafer has a crystal structure, and the break pattern comprises: through-holes formed in said wafer and formed in a direction of a scribe line of said wafer; and weak spots formed between said through-holes, respectively, wherein said scribe line is on a surface of said wafer and wherein said crystal structure of said wafer has first crystal planes oriented in a first direction and has second crystal planes oriented in a second direction, which is different than said first direction, wherein each of said through-holes is a parallelogram-shaped hole having opposed long sides defined by two of said first crystal planes and having opposed short sides defined by two of said second crystal planes that respectively intersect said two of said first crystal planes, and wherein said through-holes are disposed along said scribe line, a first group of said through-holes are substantially disposed only on a first side of said scribe line, and a second group of said through holes are substantially disposed only on a second side of said scribe line.
Yet a further illustrative, non-limiting embodiment of the present invention relates to a substrate having an edge formed when a wafer is broken according to a break pattern. The wafer has a crystal structure, and the break pattern comprises: through-holes formed in said wafer and formed in a direction of a scribe line of said wafer; and weak spots formed between said through-holes, respectively, wherein said scribe line is on a surface of said wafer and wherein said crystal structure of said wafer has first crystal planes oriented in a first direction and has second crystal planes oriented in a second direction, which is different than said first direction, wherein each of said through-holes comprise a first through-hole portion and a second through-hole portion disposed on opposite sides of said scribe line, wherein said first through-hole portion is defined by at least one inside first crystal plane of said first crystal planes, one outside first crystal plane of said first crystal planes, one second crystal plane of said second crystal planes, and one connecting surface, wherein said one outside first crystal plane is disposed further away from said scribe line than said one inside first crystal plane, wherein said one second crystal plane extends from one end of said one inside crystal plane to one end of said one outside first crystal plane, wherein said one connecting surface extends from said other end of said one outside first crystal plane towards said scribe line, wherein said second through-hole portion is defined by at least another inside first crystal plane of said first crystal planes, another outside first crystal plane of said first crystal planes, another second crystal plane of said second crystal planes, and another connecting surface, wherein said other outside first crystal plane is disposed further away from said scribe line than said other inside first crystal plane, wherein said other second crystal plane extends from one end of said other inside crystal plane to one end of said other outside first crystal plane, wherein said other connecting surface extends from said other end of said other outside first crystal plane towards said scribe line.
An additional illustrative, non-limiting embodiment of the present invention relates to a substrate having an edge formed when a wafer is broken according to a break pattern. The wafer has a crystal structure, and the break pattern comprises: through-holes formed in said wafer and formed in a direction of a scribe line of said wafer; and weak spots formed between said through-holes, respectively, wherein said scribe line is on a surface of said wafer and wherein said crystal structure of said wafer has first crystal planes oriented in a first direction and has second crystal planes oriented in a second direction, which is different than said first direction, wherein each of said through-holes have a zigzag shape and are formed by: a pair of said first crystal planes which are separated from each other in a direction of said scribe line; n pairs of said second crystal planes, wherein n is an integer greater than or equal to two, wherein said second crystal planes in each of said n pairs are disposed on opposite sides of said scribe line, and wherein one of said n pairs of said second crystal planes intersects one of said pair of said first crystal planes and another of said n pairs of said second crystal planes intersects another of said pair of said first crystal planes, and (nxe2x88x921) pairs of connecting surfaces, wherein said connecting surfaces in each of said (nxe2x88x921) pairs are disposed on opposite sides of said scribe line and are disposed between adjacent pairs of said n pairs of said second crystal planes.
Yet an additional illustrative, non-limiting embodiment of the present invention relates to a method of manufacturing a break pattern on a wafer having a crystal structure. The method comprises: forming a first opening having a parallelogram-shape with a first reduced neck, wherein said first opening is formed on a first side of a scribe line and is delineated by at least a first outside long side, a first inside long side, a first short side, a second short side, and said first reduced neck, wherein said first inside long side and said first outside long side are respectively aligned with first crystal planes of said crystal structure and said first short side and said second short side are respectively aligned with second crystal planes of said crystal structure and wherein a length of said first inside long side is reduced by said first reduced neck; forming a second opening having a parallelogram-shape with a second reduced neck, wherein said second opening is formed on a second side of said scribe line and is delineated by at least a second outside long side, a second inside long side, a third short side, a fourth short side, and said second reduced neck, wherein said second inside long side and said second outside long side are respectively aligned with said first crystal planes and said third short side and said fourth short side are respectively aligned with said second crystal planes and wherein a length of said second inside long side is reduced by said second reduced neck, wherein said first reduced neck and said second reduced neck face each other across said scribe line and a gap exists between said first reduced neck and said second reduced neck; etching a first portion of said wafer corresponding to said first opening to produce a first through-hole portion of a through-hole; etching a second portion of said wafer corresponding to said second opening to produce a second through-hole portion of said through-hole; etching a third portion of said wafer corresponding to said gap to produce a third through-hole portion of said through-hole, wherein said third through-hole portion connects said first through-hole portion and said second through-hole portion.
Still an additional illustrative, non-limiting embodiment of the present invention relates to a method of manufacturing a break pattern on a wafer having a crystal structure. The method comprises: forming a first parallelogram-shaped opening in which short sides of said first opening are respectively aligned with first crystal planes of said crystal structure and long sides of said first opening are respectively aligned with second crystal planes of said crystal structure; forming a second parallelogram-shaped opening in which short sides of said second opening are respectively aligned with said first crystal planes and long sides of said second opening are respectively aligned with said second crystal planes; forming a first connecting strip between said first opening and said second opening; wherein said first connecting strip has a first end connected to one long side of said first opening and has a second end connected to one long side of said second opening, wherein a first gap portion is defined between said first connecting strip and said first opening, and wherein a second gap portion is defined between said first connecting strip and said second opening; etching a first portion of said wafer corresponding to said first opening and said second opening to produce at least part of a first through-hole portion of a through-hole; etching a second portion of said wafer corresponding to said first gap portion to produce at least part of a second through-hole portion of said through-hole; and etching a third portion of said wafer corresponding to said second gap portion to produce at least part of a third through-hole portion of said through-hole.